- Date: Friday, November 12, 2004
- Time: 9:00am to 5:00pm US-PST (Continental breakfast provided)
- Venue: Mentor Graphics Corp, 1001 Ridder Park Dr, San Jose, CA 95131, USA
Please contact Peter Ashenden for dial-in details if you cannot attend in person. Thanks.
Agenda
See agenda slides with links to relevant documents.
- Call to order
- Minutes of meeting on 20 September, 2004 in Piscataway, NJ
- Business arising from the minutes
- Report of business conducted by email
- Financial Report
- Reports from Liaison Representatives
- IEEE-CS/SAB
- IEC
- Maintenance of IEEE-IEC dual logo standards
- JEITA
- DATC
- EIA IBIS Open Forum presentation (Michael Mirmak, Chair)
- Project reports
- 1076 (VHDL)
- 1076.1 (VHDL-AMS)
- 1076.1.1 (VHDL-AMS packages)
- 1076.4 (VITAL)
- 1076.6 (VHDL Synthesis Interoperability)
- 1364.1 (Verilog Synthesis Ineroperability)
- 1481 (OLA)
- 1497 (SDF)
- 1499 (OMI)
- 1603 (ALF)
- 1647 (e)
- 1800/1364 (SystemVerilog/Verilog)
- 1850 (PSL)
- Study Group reports
- WG governance review
- Rosters received
- Elections: progress and confirmations
- Procedures review
- Proposed amendments to DASC/DASC-SC/WG procedures (see proposal):
- procedure for making a motion for call for discussion of an issue/proposal
- procedure for making a motion for call for vote on an issue/proposal
- DASC role in EDA standards development
- Sponsoring individual- and entity-based projects
- Relationships with other committees and organizations
- Membership provisions and fees: individual and entity
- DASC technical governance (Alex Z)
- Review of DASC Patent Policy
- IEEE policy on dissemination of IP from standards projects
- Publication of drafts
- Dissemination of code from standards
- VuSpec publication proposal
- Activities and meeting schedule for 2005
- Workshop sponsorship and co-sponsorship
- DASC-SC meeting schedule
- DASC plenary
- Other business
- Adjourn
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