- Date: Friday, 17 June, 2005
- Time: 8:00am to 12 noon, US Pacific Time
- Venue: Hilton Anaheim, Santa Monica Room
Please contact Peter Ashenden for dial-in details if you cannot attend in person. Thanks.
Agenda
There will be agenda slides with links to relevant documents.
- Call to order
- Minutes of meeting on 10 March, 2005 in Munich, Germany
- Business arising from the minutes
- Report of business conducted by email
- Financial Report
- Reports from Liaison Representatives
- IEEE-CS/SAB
- IEC
- JEITA
- DATC
- Project reports
- 1076 (VHDL)
- 1076.1 (VHDL-AMS)
- 1076.1.1 (VHDL-AMS packages)
- 1076.4 (VITAL)
- 1076.6 (VHDL Synthesis Interoperability)
- 1364.1 (Verilog Synthesis Ineroperability)
- 1481 (OLA)
- 1497 (SDF)
- 1499 (OMI)
- 1603 (ALF)
- 1647 (e)
- 1666 (SystemC)
- 1800/1364 (SystemVerilog/Verilog)
- 1850 (PSL)
- Study Group reports
- WG governance review
- Review of DASC Patent Policy
- IEEE policy on dissemination of IP from standards projects
- Activities and meeting schedule
- Other business
- Adjourn
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